Design-Reuse9h
Mirabilis Design Adds System-Level Modelling Support for Industry-Standard Arteris FlexNoC and Ncore Network-on-Chip IPs
Mirabilis Design announced today the latest addition to the VisualSim Architect with modelling support for Arteris’ FlexNoC ...
Design-Reuse5h
Accellera Board Approves Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 Standard for Release
Accellera announced today that its Board of Directors has approved the Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 standard for release. The new standard is available for ...
Design-Reuse1d
CoMira Solutions unveils its new 1.6T Ethernet UMAC IP
CoMira Solutions today announced its new 1.6T Ethernet UMAC IP. This specified UMAC IP delivers 1.6Tbps bandwidth with low ...
Design-Reuse1d
Dolphin Semiconductor strengthens its governance with two key Board appointments
Dolphin Semiconductor, a leading provider of semiconductor IP solutions specializing in mixed-signal IP design, is announcing ...
Design-Reuse2d
Intel Halts Products, Slows Roadmap in Years-Long Turnaround
Intel has scrapped product launches and slowed its process technology roadmap as it embarks on a path toward a rebound that ...
Design-Reuse6d
EXTOLL collaborates with BeammWave and GlobalFoundries as a Key SerDes IP Partner for Lowest Power High-Speed ASIC
EXTOLL, a leading provider of high-speed and ultra-low-power SerDes and Chiplet connectivity, has been selected by BeammWave, ...
Design-Reuse2d
Hardware-Assisted Verification: The Real Story Behind Capacity
While design engineers contemplate the power, performance and area calculation of an SoC design, their verification ...
Design-Reuse7d
Mixel Announces the Opening of New Branch in Da Nang, Vietnam
This office represents a key milestone for Mixel as its first in Asia. It will enable Mixel to expand its engineering talent, ...
Design-Reuse7d
intoPIX and Nextera-Adeas Announce Latest IPMX Demo Design with JPEG XS on Compact FPGAs at ISE 2025
PIX, the pioneering provider of lightweight compression solutions, is thrilled to continue its collaboration with Nextera ...
Design-Reuse7d
Bigger Chips, More IPs, and Mounting Challenges in Addressing the Growing Complexity of SoC Design
As the semiconductor industry pushes the boundaries of innovation, modern system-on-chip (SoC) designs are growing ...
Design-Reuse8d
How JESD204 Self-Synchronizing Receiver works: An in-depth look
The JESD204 Standard has undergone several iterations since its initial release in April 2006, the Serdes capabilities and ...
Design-Reuse12d
SoC design: What's next for NoCs?
SoC designers face rapid expansion in architecture, time-to-market pressures, scarcity of expertise, suboptimal utilization ...